IndeeMicro Technologies
Frequently asked questions
RTL to GDSII is the complete VLSI design flow starting from Register Transfer Level (RTL) coding to final chip layout (GDSII). It includes synthesis, floorplanning, placement, clock tree synthesis, routing, and signoff.
This course is ideal for:
- B.E/B.Tech (ECE, EEE, E&I)
- M.Tech (VLSI, Embedded)
- Freshers and working professionals interested in semiconductor design
Basic knowledge of:
- Digital Electronics
- Verilog/SystemVerilog (preferred but not mandatory)
We also cover fundamentals in the initial sessions.
Industry-standard tools such as:
- Synopsys / Cadence tools
- Design Compiler
- ICC2 / Innovus
- PrimeTime
- RTL Design & Coding
- Logic Synthesis
- Floorplanning
- Placement & Optimization
- Clock Tree Synthesis (CTS)
- Routing
- Static Timing Analysis (STA)
- Physical Verification (DRC/LVS)
The program is 100% practical-oriented with:
- Real-time projects
- Hands-on tool experience
- Industry-based scenarios
Yes, we provide:
- Resume building
- Mock interviews
- Job referrals
- Placement support
Typically:
- 3 to 6 months (depending on batch & depth)
Yes, you will receive a course completion certificate after successfully finishing the training.
- Live instructor-led sessions
- Recorded sessions (for revision)
You can apply for roles like:
- Physical Design Engineer
- VLSI Design Engineer
- STA Engineer
- Backend Engineer
Yes, you will work on:
- Real-time RTL to GDSII projects
- Industry-relevant case studies
We maintain small batch sizes for better interaction and learning.
Yes, we provide:
- Doubt support
- Interview guidance
- Career mentorship
You can enroll by:
- Contacting us directly
- Visiting our website
- Filling out the inquiry form